United States Brand: SIMULIA
Industry: High-Tech

eASIC uses electromagnetic simulation with CST Studio Suite to reduce multi-level package design times.

The Challenge

When designing a chip for a high-speed application, the whole channel, including the package and the printed circuit board (PCB), affects the performance. The PCB layout needs to be taken into account during the design stage, to improve the performance of the device and reduce the risk of problems emerging once installed. Because PCBs are both large and complex while packages are small and intricate, modeling the entire system in one go is computationally intensive, requires long simulation times and heavy memory consumption.

Dassault Systèmes Response

eASIC chose CST Studio Suite as it allows simulations to be linked and cascaded, meaning that the PCB simulation can be split, with the package and PCB modeled separately.


By using CST Studio Suite and partitioning the model, eASIC was able to achieve up to five-fold speed-up in its multi-level PCB and package simulations, when compared with simulation using the full model. This gave eASIC a significant speed advantage and helped them to shorten the design process.